{"id":465,"date":"2022-05-26T10:37:00","date_gmt":"2022-05-26T07:37:00","guid":{"rendered":"https:\/\/ecsalab.ece.uop.gr\/?p=465"},"modified":"2026-03-30T16:40:01","modified_gmt":"2026-03-30T13:40:01","slug":"journals","status":"publish","type":"post","link":"https:\/\/ecsalab.ece.uop.gr\/?p=465","title":{"rendered":"JOURNALS"},"content":{"rendered":"\n

Stavros Kalapothas, Georgios Flamis, Paris Kitsos, “Efficient Edge-AI Application Deployment for FPGAs\u201d, Information 2022, 13(6), 279; https:\/\/doi.org\/10.3390\/info13060279 .<\/p>\n\n\n\n

Ludwig Kapmel, Paris Kitsos, Dimitris Simos, \u201cLocating Hardware Trojans Using Combinatorial Testing for Cryptographic Circuits\u201d, IEEE Access, Vol. 10, pp: 18787 – 18806, 2022, DOI: 10.1109\/ACCESS.2022.3151378.<\/p>\n\n\n\n

Konstantinos G. Liakos, Georgios K. Georgakilas, Fotis C. Plessas, Paris Kitsos, \u201cGAINESIS: Generative Artificial Intelligence NEtlists SynthesIS\u201d, Electronics \u2013 Open Access Journal, Vol. 11, No. 2, 2022.<\/p>\n\n\n\n

Georgios Flamis, Stavros Kalapothas, Paris Kitsos, \u201cBest practices for the deployment of edge inference: The conclusions to start designing\u201d, Electronics \u2013 Open Access Journal, Vol. 10, 2021.<\/p>\n\n\n\n

C. Efstathiou and P. Kitsos, “Efficient majority logic magnitude comparator design”, Embedded Hardware Design: Microprocessors and Microsystems, Elsevier, Volume 82, April 2021.<\/p>\n\n\n\n

Andreas Tsimpos, Andreas Christos Demartinos, Spyridon Vlassis, George Souliotis, “Multi-rate programmable equalizer for M-PHY serial interface”, IEEE Transactions on Emerging Topics in Computing, Manuscript Type: Special Issue, vol. 9, issue. 1, pp. 379-398, January 2021.<\/p>\n\n\n\n

L. Pyrgas, P. Kitsos, \u201cCompact Hardware Architectures of Enocoro-128v2 Stream Cipher for Constrained Embedded Devices\u201d, Electronics \u2013 Open Access Journal, Vol. 9, Issue. 9, 1505-1519, 2020.<\/p>\n\n\n\n

F. Pirpilidis, L. Pyrgas, P. Kitsos, “8-bit Serialised Architecture of SEED Block Cipher for Constrained Devices”, IET Circuits, Devices & Systems, 2020.<\/p>\n\n\n\n

Apostolos Fournaris, Lampros Pyrgas, Paris Kitsos, \u201cAn Efficient Multi-parameter Approach for FPGA Hardware Trojan Detection\u201d, Embedded Hardware Design: Microprocessors and Microsystems, Elsevier, Vol. 71, November 2019.<\/p>\n\n\n\n

Spyridon Vlassis, George Souliotis, Fabian Khateb, Tomasz Kulej, “A 0.5V bulk-driven active voltage attenuator”, Circuits, Systems, and Signal Processing, 38, pp. 5883\u20135895, 2019.<\/p>\n\n\n\n

Spyridon Vlassis, Fabian Khateb, George Souliotis, “An on-chip linear, squaring, cubic and exponential analog function generator”, IEEE Transactions on Circuits and Systems \u2013 I (CAS-I), January 2019, vol. 66, issue 1, pp. 94-104, doi: 10.1109\/TCSI.2018.2841039.<\/p>\n\n\n\n

Fotis Plessas, George Souliotis, Rodoula Makri, \u201cA 76-84GHz CMOS 4x Subharmonic Mixer with Internal Phase Correction\u201d, IEEE Transactions on Circuits and Systems \u2013 I (CAS-I), January 2018, vol. 65, issue 7, pp. 2083-2096.<\/p>\n\n\n\n

George Souliotis, Fotis Plessas, Spyridon Vlassis, \u201cA high accuracy voltage reference generator\u201d, Microelectronics Journal, 75, 2018, pp. 61 – 67. https:\/\/authors.elsevier.com\/a\/1WhRe5~H7NSJG.<\/p>\n\n\n\n

Andreas Tsimpos, Andreas Christos Demartinos, Spyridon Vlassis, George Souliotis, “A low-power frequency multiplier for multi-GHz applications”, IEEE Transactions on Emerging Topics in Computing, June 2018, vol. 6, issue 2, pp. 200 – 206. (doi:10.1109\/TETC.2016.2582732).<\/p>\n\n\n\n

F. Pirpilidis, K. G. Stefanidis, A. G. Voyiatzis, P. Kitsos, \u201cEffect analysis of Ring Oscillator length and hardware Trojan size on an FPGA-based implementation of the AES algorithm\u201d, Embedded Hardware Design: Microprocessors and Microsystems, Elsevier, Vol. 54, 2017.<\/p>\n\n\n\n

Spyridon Vlassis, Tomasz Kulej, Fabian Khateb, George Souliotis, “0.5V bulk-driven ring amplifier based on master-slave technique”, Integrated Circuits & Signal Processing (ALOG), 90, pp. 189\u2013197, 2017. DOI 10.1007\/s10470-016-0858-2. http:\/\/rdcu.be\/vFVd.<\/p>\n\n\n\n

A. Demartinos, A. Tsimpos, S. Vlassis, G. Souliotis, \u201cJitter tolerance modeling and calibration for high-speed serial interfaces\u201d, Integration, the VLSI Journal (Elsevier), vol. 57, pp. 101-107, 2017.<\/p>\n\n\n\n

Andreas Demartinos, Andreas Tsimpos, Spiros Vlassis, George Souliotis. \u201cAnalogue feedback inverter based duty-cycle correction\u201d, Analog Integrated Circuits and Signal Processing (ALOG\/Springer), vol. 90, pp. 711\u2013716, 2017. DOI 10.1007\/s10470-016-0921-z.<\/p>\n\n\n\n

Fabian Khateb, Spyridon Vlassis, Tomasz Kulej, George Souliotis, “Bulk-driven class AB fully-balanced differential difference amplifier”, Analog Integrated Circuits and Signal Processing, October 2017, vol. 93, Issue 1, pp. 179\u2013187. http:\/\/rdcu.be\/ugbj.<\/p>\n\n\n\n

George Souliotis, Costas Laoudias, Fotis Plessas and Nikolaos Terzopoulos, “Phase interpolator with improved linearity”, Circuits, Systems and Signal Processing, 35(2), pp. 367-383, February 2016. (DOI: 10.1007\/s00034-015-0082-9).<\/p>\n\n\n\n

Andreas Tsimpos, Andreas Christos Demartinos, George Souliotis, Spiros Vlassis, \u201cMulti-rate Phase Interpolator for High Speed Serial Interfaces\u201d, Microelectronics Journal, vol. 54, pp. 40\u201347, August 2016. doi:10.1016\/j.mejo.2016.05.008.<\/p>\n\n\n\n

Andreas C. Demartinos, Andreas Tsimpos, Spyridon Vlassis, George Souliotis, Savvas Sgourenas. \u201cA scalable Voltage Controlled Oscillator for Multi-rate High-Speed Interfaces”, Microelectronics Journal, vol. 55, pp. 134\u2013142, September 2016. doi: 10.1016\/j.mejo.2016.07.003.<\/p>\n\n\n\n

Andreas Christos Demartinos, Andreas Tsimpos, Spyridon Vlassis, George Souliotis. \u201cDelay Elements Suitable for CMOS Ring Oscillators\u201d, Journal of Engineering Science and Technology Review, 9(4), pp. 98-101, 2016.<\/p>\n\n\n\n

A. Fournaris, I. Zafeirakis, P. Kitsos, O Koufopavlou, \u201cComparing Elliptic Curve Point Multiplication Design Approaches for Cryptography\u201d, Embedded Hardware Design: Microprocessors and Microsystems, Elsevier, 2015.<\/p>\n\n\n\n

E. Cuevas-Farfan, M. Morales-Sandoval, A. Morales-Reyes, C. Feregrino-Uribe, I. Algredo-Badilio, P. Kitsos, R. Cumplido, \u201cKaratsuba-Ofman Multiplier with Integrated Modular Reduction for (2^^m)\u201d, Advances in Electrical and Computer Engineering, Volume 13, Number 2, 2013.<\/p>\n\n\n\n

P. Kitsos, N. Sklavos, G. Provelengios, A. N. Skodras, \u201cFPGA-based Performance Analysis of Stream Ciphers ZUC, Snow3g, Grain v1, Mickey v2, Trivium and E0\u201d, Embedded Hardware Design: Microprocessors and Microsystems, Elsevier, Vol. 37, Issue 2, 2013.<\/p>\n\n\n\n

Morales-Sandoval, C. Feregrino-Ubire, R. Cumplido, P. Kitsos, \u201cArea\/Performance trade-off analysis of an FPGA digit-serial GF(2^m) Montgomery Multiplier based on LFSR\u201d, Computer and Electrical Engineering, Elsevier, Vol. 39, Issue 2, 2013.<\/p>\n\n\n\n

L. Bisdounis, “Analytical modeling of overshooting effect in sub-100nm CMOS inverters, Journal of Circuits, Systems, and Computers”, World Scientific, vol. 20, no. 7, pp. 1303-1321, November 2011.<\/p>\n\n\n\n

M. Morales-Sandoval, C. Feregrino-Uribe and P. Kitsos, \u201cBit-Serial and Digit-Serial GF(2^^m) Montgomery Multipliers using Linear Feedback Shift Registers\u201d, IET Computers & Digital Techniques Journal, Vol. 5, Issue. 2, March 2011.<\/p>\n\n\n\n

B. Geelen, V. Ferentinos, F. Catthoor, G. Lafruit, R. Lauwereins, D. Verkest, and T. Stouraitis, \u201cModeling and exploiting spatial locality trade-offs in wavelet-based applications under varying resource requirements\u201d, ACM Transactions on Embedded Computing Systems (TECS), 9(3): (2010).<\/p>\n\n\n\n

B. Geelen, V. Ferentinos, F. Catthoor, S. Toulatos, G. Lafruit, T. Stouraitis, R. Lauwereins, and D. Verkest, \u201cExploiting varying resource requirements in wavelet-based applications in dynamic execution environments\u201d, The Journal of Signal Processing Systems, 2009, Volume 56, Numbers 2-3.<\/p>\n\n\n\n

B. Geelen, V. Ferentinos, F. Catthoor, G. Lafruit, D. Verkest, R. Lauwereins, and T. Stouraitis, \u201cSpatial locality exploitation for runtime reordering of JPEG2000 wavelet data layouts\u201d, ACM Transaction on Design Automation of Electronic Systems (TODAES), 15(1): (2009).<\/p>\n\n\n\n

P. Kitsos, N. Sklavos, and O. Koufopavlou, \u201cUMTS Security: System Architecture and Hardware Implementation\u201d, Wireless Communications and Mobile Computing Journal, Volume 7, Issue 4, May 2007.<\/p>\n\n\n\n

S. Nikolaidis, N. Kavvadias, T. Laopoulos, L. Bisdounis, S. Blionas, “Instruction-level energy modeling for pipelined processors, Journal of Embedded Computing”, IOS Press, vol. 1, no. 3 (special issue on low-power embedded systems), pp. 317-324, March 2006.<\/p>\n\n\n\n

N. Sklavos, P. Kitsos, K. Papadopoulos and O. Koufopavlou, \u201cDesign, Architecture and Performance Evaluation of the Wireless Transport Layer Security (WTLS)\u201d, Journal of Supercomputing, Kluwer Academic Publishers, Volume 36, No. 1, pp: 33-50, 2006.<\/p>\n\n\n\n

P. Kitsos, M. D. Galanis, and O. Koufopavlou, \u201cAn FPGA Implementation of the GPRS Encryption Algorithm 3 (GEA3)\u201d, Journal of Circuits, Systems, and Computers (JCSC), World Scientific Publishing Company, Vol. 14, No. 2, pp: 217-231, 2005.<\/p>\n\n\n\n

V. Ferentinos, B. Geelen, G. Lafruit, M. Milia, J. Bormans, F. Catthoor, and T. Stouraitis, \u201cOptimized memory requirements for wavelet-based scalable multimedia codecs\u201d, Journal of Embedded Computing (JEC), vol. 1, no. 3, pages 363\u2013380, 2005.<\/p>\n\n\n\n

L. Bisdounis, C. Dre, S. Blionas, D. Metafas, A. Tatsaki, F. Ieromnimon, E. Macii, Ph. Rouzet, R. Zafalon, L. Benini, “Low-power system-on-chip architecture for wireless LANs”, IEE Computers and Digital Techniques, vol. 151, no. 1, pp. 2-15, January 2004.<\/p>\n\n\n\n

G. Lafruit, E. Delfosse, R. Osorio, W. van Raemdonck, V. Ferentinos, J. Bormans, \u201cView-dependent, scalable Texture Streaming in 3D QoS with MPEG-4 Visual Texture Coding\u201d, IEEE Tr. Circuits and Systems for Video technology, Vol. 14: (7) 1021-1031; 2004.<\/p>\n\n\n\n

C. Drosos, L. Bisdounis, D. Metafas, S. Blionas, A. Tatsaki, G. Papadopoulos, “Hardware-software design and validation framework for wireless LAN modems”, IET Computers and Digital Techniques, vol. 151, no. 3, pp. 173-182, May 2004.<\/p>\n\n\n\n

P. Kitsos, N. Sklavos, M. D. Galanis, and O. Koufopavlou, \u201c64-bit Block Ciphers: Hardware Implementation and Comparison Analysis\u201d, Computers and Electrical Engineering, Elsevier Science, Vol. 30, Issue: 8, pp. 593-604, November 2004.<\/p>\n\n\n\n

P. Kitsos and O. Koufopavlou, \u201cEfficient Architecture and Hardware Implementation of the Whirlpool Hash Function\u201d, IEEE Transactions on Consumer Electronics, Vol. 50, Issue 1, February 2004, pp. 208-213.<\/p>\n\n\n\n

P. Kitsos, G. Theodoridis, and O. Koufopavlou, \u201cAn Efficient Reconfigurable Multiplier Architecture for Galois field GF(2^^m)\u201d, Elsevier Microelectronics Journal, Vol. 34, Issue 10, October 2003, pp. 975-980.<\/p>\n\n\n\n

P. Kitsos, N. Sklavos, K. Papadomanolakis and O. Koufopavlou, \u201cHardware Implementation of the Bluetooth Security\u201d, IEEE Pervasive Computing, Mobile and Ubiquitous Systems, Vol. 2, No. 1, Jan.-Mar. 2003, pp. 21-29.<\/p>\n","protected":false},"excerpt":{"rendered":"

Stavros Kalapothas, Georgios Flamis, Paris Kitsos, “Efficient Edge-AI Application Deployment for FPGAs\u201d, Information 2022, 13(6), 279; https:\/\/doi.org\/10.3390\/info13060279 . Ludwig Kapmel, Paris Kitsos, Dimitris Simos, \u201cLocating Hardware Trojans Using Combinatorial Testing for Cryptographic Circuits\u201d, IEEE Access, Vol. 10, pp: 18787 – 18806, 2022, DOI: 10.1109\/ACCESS.2022.3151378. Konstantinos G. Liakos, Georgios K. Georgakilas, Fotis C. Plessas, Paris Kitsos,…<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[12],"tags":[],"class_list":["post-465","post","type-post","status-publish","format-standard","hentry","category-journals"],"gutentor_comment":0,"yoast_head":"\nJOURNALS -<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/ecsalab.ece.uop.gr\/?p=465\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"JOURNALS -\" \/>\n<meta property=\"og:description\" content=\"Stavros Kalapothas, Georgios Flamis, Paris Kitsos, “Efficient Edge-AI Application Deployment for FPGAs\u201d, Information 2022, 13(6), 279; https:\/\/doi.org\/10.3390\/info13060279 . Ludwig Kapmel, Paris Kitsos, Dimitris Simos, \u201cLocating Hardware Trojans Using Combinatorial Testing for Cryptographic Circuits\u201d, IEEE Access, Vol. 10, pp: 18787 – 18806, 2022, DOI: 10.1109\/ACCESS.2022.3151378. Konstantinos G. Liakos, Georgios K. Georgakilas, Fotis C. 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class=\"yoast-schema-graph\">{\"@context\":\"https:\\\/\\\/schema.org\",\"@graph\":[{\"@type\":\"Article\",\"@id\":\"https:\\\/\\\/ecsalab.ece.uop.gr\\\/?p=465#article\",\"isPartOf\":{\"@id\":\"https:\\\/\\\/ecsalab.ece.uop.gr\\\/?p=465\"},\"author\":{\"name\":\"papadomarn\",\"@id\":\"https:\\\/\\\/ecsalab.ece.uop.gr\\\/#\\\/schema\\\/person\\\/97d3f9bab21700a7a92b73d9948dd665\"},\"headline\":\"JOURNALS\",\"datePublished\":\"2022-05-26T07:37:00+00:00\",\"dateModified\":\"2026-03-30T13:40:01+00:00\",\"mainEntityOfPage\":{\"@id\":\"https:\\\/\\\/ecsalab.ece.uop.gr\\\/?p=465\"},\"wordCount\":1234,\"publisher\":{\"@id\":\"https:\\\/\\\/ecsalab.ece.uop.gr\\\/#organization\"},\"articleSection\":[\"Journals\"],\"inLanguage\":\"en-US\"},{\"@type\":\"WebPage\",\"@id\":\"https:\\\/\\\/ecsalab.ece.uop.gr\\\/?p=465\",\"url\":\"https:\\\/\\\/ecsalab.ece.uop.gr\\\/?p=465\",\"name\":\"JOURNALS -\",\"isPartOf\":{\"@id\":\"https:\\\/\\\/ecsalab.ece.uop.gr\\\/#website\"},\"datePublished\":\"2022-05-26T07:37:00+00:00\",\"dateModified\":\"2026-03-30T13:40:01+00:00\",\"breadcrumb\":{\"@id\":\"https:\\\/\\\/ecsalab.ece.uop.gr\\\/?p=465#breadcrumb\"},\"inLanguage\":\"en-US\",\"potentialAction\":[{\"@type\":\"ReadAction\",\"target\":[\"https:\\\/\\\/ecsalab.ece.uop.gr\\\/?p=465\"]}]},{\"@type\":\"BreadcrumbList\",\"@id\":\"https:\\\/\\\/ecsalab.ece.uop.gr\\\/?p=465#breadcrumb\",\"itemListElement\":[{\"@type\":\"ListItem\",\"position\":1,\"name\":\"Home\",\"item\":\"https:\\\/\\\/ecsalab.ece.uop.gr\\\/\"},{\"@type\":\"ListItem\",\"position\":2,\"name\":\"JOURNALS\"}]},{\"@type\":\"WebSite\",\"@id\":\"https:\\\/\\\/ecsalab.ece.uop.gr\\\/#website\",\"url\":\"https:\\\/\\\/ecsalab.ece.uop.gr\\\/\",\"name\":\"https:\\\/\\\/ecsalab.ece.uop.gr\\\/\",\"description\":\"\",\"publisher\":{\"@id\":\"https:\\\/\\\/ecsalab.ece.uop.gr\\\/#organization\"},\"potentialAction\":[{\"@type\":\"SearchAction\",\"target\":{\"@type\":\"EntryPoint\",\"urlTemplate\":\"https:\\\/\\\/ecsalab.ece.uop.gr\\\/?s={search_term_string}\"},\"query-input\":{\"@type\":\"PropertyValueSpecification\",\"valueRequired\":true,\"valueName\":\"search_term_string\"}}],\"inLanguage\":\"en-US\"},{\"@type\":\"Organization\",\"@id\":\"https:\\\/\\\/ecsalab.ece.uop.gr\\\/#organization\",\"name\":\"Electronics Circuits, Systems and Applications laboratory\",\"url\":\"https:\\\/\\\/ecsalab.ece.uop.gr\\\/\",\"logo\":{\"@type\":\"ImageObject\",\"inLanguage\":\"en-US\",\"@id\":\"https:\\\/\\\/ecsalab.ece.uop.gr\\\/#\\\/schema\\\/logo\\\/image\\\/\",\"url\":\"https:\\\/\\\/ecsalab.ece.uop.gr\\\/wp-content\\\/uploads\\\/2022\\\/05\\\/cropped-ECSA-lab-logo-Final.jpg\",\"contentUrl\":\"https:\\\/\\\/ecsalab.ece.uop.gr\\\/wp-content\\\/uploads\\\/2022\\\/05\\\/cropped-ECSA-lab-logo-Final.jpg\",\"width\":512,\"height\":512,\"caption\":\"Electronics Circuits, Systems and Applications laboratory\"},\"image\":{\"@id\":\"https:\\\/\\\/ecsalab.ece.uop.gr\\\/#\\\/schema\\\/logo\\\/image\\\/\"},\"sameAs\":[\"https:\\\/\\\/gr.linkedin.com\\\/in\\\/ecsalab?trk=public_profile_browsemap\"]},{\"@type\":\"Person\",\"@id\":\"https:\\\/\\\/ecsalab.ece.uop.gr\\\/#\\\/schema\\\/person\\\/97d3f9bab21700a7a92b73d9948dd665\",\"name\":\"papadomarn\",\"image\":{\"@type\":\"ImageObject\",\"inLanguage\":\"en-US\",\"@id\":\"https:\\\/\\\/secure.gravatar.com\\\/avatar\\\/823d3a230f6eac27bfbd1124b4c4d3a697a42d418eaaf83910f61fe619c1a009?s=96&d=mm&r=g\",\"url\":\"https:\\\/\\\/secure.gravatar.com\\\/avatar\\\/823d3a230f6eac27bfbd1124b4c4d3a697a42d418eaaf83910f61fe619c1a009?s=96&d=mm&r=g\",\"contentUrl\":\"https:\\\/\\\/secure.gravatar.com\\\/avatar\\\/823d3a230f6eac27bfbd1124b4c4d3a697a42d418eaaf83910f61fe619c1a009?s=96&d=mm&r=g\",\"caption\":\"papadomarn\"},\"sameAs\":[\"https:\\\/\\\/ecsalab.ece.uop.gr\"],\"url\":\"https:\\\/\\\/ecsalab.ece.uop.gr\\\/?author=1\"}]}<\/script>\n<!-- \/ Yoast SEO plugin. -->","yoast_head_json":{"title":"JOURNALS -","robots":{"index":"index","follow":"follow","max-snippet":"max-snippet:-1","max-image-preview":"max-image-preview:large","max-video-preview":"max-video-preview:-1"},"canonical":"https:\/\/ecsalab.ece.uop.gr\/?p=465","og_locale":"en_US","og_type":"article","og_title":"JOURNALS -","og_description":"Stavros Kalapothas, Georgios Flamis, Paris Kitsos, “Efficient Edge-AI Application Deployment for FPGAs\u201d, Information 2022, 13(6), 279; https:\/\/doi.org\/10.3390\/info13060279 . Ludwig Kapmel, Paris Kitsos, Dimitris Simos, \u201cLocating Hardware Trojans Using Combinatorial Testing for Cryptographic Circuits\u201d, IEEE Access, Vol. 10, pp: 18787 – 18806, 2022, DOI: 10.1109\/ACCESS.2022.3151378. Konstantinos G. Liakos, Georgios K. Georgakilas, Fotis C. Plessas, Paris Kitsos,…","og_url":"https:\/\/ecsalab.ece.uop.gr\/?p=465","article_published_time":"2022-05-26T07:37:00+00:00","article_modified_time":"2026-03-30T13:40:01+00:00","author":"papadomarn","twitter_card":"summary_large_image","twitter_misc":{"Written by":"papadomarn","Est. reading time":"6 minutes"},"schema":{"@context":"https:\/\/schema.org","@graph":[{"@type":"Article","@id":"https:\/\/ecsalab.ece.uop.gr\/?p=465#article","isPartOf":{"@id":"https:\/\/ecsalab.ece.uop.gr\/?p=465"},"author":{"name":"papadomarn","@id":"https:\/\/ecsalab.ece.uop.gr\/#\/schema\/person\/97d3f9bab21700a7a92b73d9948dd665"},"headline":"JOURNALS","datePublished":"2022-05-26T07:37:00+00:00","dateModified":"2026-03-30T13:40:01+00:00","mainEntityOfPage":{"@id":"https:\/\/ecsalab.ece.uop.gr\/?p=465"},"wordCount":1234,"publisher":{"@id":"https:\/\/ecsalab.ece.uop.gr\/#organization"},"articleSection":["Journals"],"inLanguage":"en-US"},{"@type":"WebPage","@id":"https:\/\/ecsalab.ece.uop.gr\/?p=465","url":"https:\/\/ecsalab.ece.uop.gr\/?p=465","name":"JOURNALS -","isPartOf":{"@id":"https:\/\/ecsalab.ece.uop.gr\/#website"},"datePublished":"2022-05-26T07:37:00+00:00","dateModified":"2026-03-30T13:40:01+00:00","breadcrumb":{"@id":"https:\/\/ecsalab.ece.uop.gr\/?p=465#breadcrumb"},"inLanguage":"en-US","potentialAction":[{"@type":"ReadAction","target":["https:\/\/ecsalab.ece.uop.gr\/?p=465"]}]},{"@type":"BreadcrumbList","@id":"https:\/\/ecsalab.ece.uop.gr\/?p=465#breadcrumb","itemListElement":[{"@type":"ListItem","position":1,"name":"Home","item":"https:\/\/ecsalab.ece.uop.gr\/"},{"@type":"ListItem","position":2,"name":"JOURNALS"}]},{"@type":"WebSite","@id":"https:\/\/ecsalab.ece.uop.gr\/#website","url":"https:\/\/ecsalab.ece.uop.gr\/","name":"https:\/\/ecsalab.ece.uop.gr\/","description":"","publisher":{"@id":"https:\/\/ecsalab.ece.uop.gr\/#organization"},"potentialAction":[{"@type":"SearchAction","target":{"@type":"EntryPoint","urlTemplate":"https:\/\/ecsalab.ece.uop.gr\/?s={search_term_string}"},"query-input":{"@type":"PropertyValueSpecification","valueRequired":true,"valueName":"search_term_string"}}],"inLanguage":"en-US"},{"@type":"Organization","@id":"https:\/\/ecsalab.ece.uop.gr\/#organization","name":"Electronics Circuits, Systems and Applications laboratory","url":"https:\/\/ecsalab.ece.uop.gr\/","logo":{"@type":"ImageObject","inLanguage":"en-US","@id":"https:\/\/ecsalab.ece.uop.gr\/#\/schema\/logo\/image\/","url":"https:\/\/ecsalab.ece.uop.gr\/wp-content\/uploads\/2022\/05\/cropped-ECSA-lab-logo-Final.jpg","contentUrl":"https:\/\/ecsalab.ece.uop.gr\/wp-content\/uploads\/2022\/05\/cropped-ECSA-lab-logo-Final.jpg","width":512,"height":512,"caption":"Electronics Circuits, Systems and Applications laboratory"},"image":{"@id":"https:\/\/ecsalab.ece.uop.gr\/#\/schema\/logo\/image\/"},"sameAs":["https:\/\/gr.linkedin.com\/in\/ecsalab?trk=public_profile_browsemap"]},{"@type":"Person","@id":"https:\/\/ecsalab.ece.uop.gr\/#\/schema\/person\/97d3f9bab21700a7a92b73d9948dd665","name":"papadomarn","image":{"@type":"ImageObject","inLanguage":"en-US","@id":"https:\/\/secure.gravatar.com\/avatar\/823d3a230f6eac27bfbd1124b4c4d3a697a42d418eaaf83910f61fe619c1a009?s=96&d=mm&r=g","url":"https:\/\/secure.gravatar.com\/avatar\/823d3a230f6eac27bfbd1124b4c4d3a697a42d418eaaf83910f61fe619c1a009?s=96&d=mm&r=g","contentUrl":"https:\/\/secure.gravatar.com\/avatar\/823d3a230f6eac27bfbd1124b4c4d3a697a42d418eaaf83910f61fe619c1a009?s=96&d=mm&r=g","caption":"papadomarn"},"sameAs":["https:\/\/ecsalab.ece.uop.gr"],"url":"https:\/\/ecsalab.ece.uop.gr\/?author=1"}]}},"_links":{"self":[{"href":"https:\/\/ecsalab.ece.uop.gr\/index.php?rest_route=\/wp\/v2\/posts\/465","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/ecsalab.ece.uop.gr\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/ecsalab.ece.uop.gr\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/ecsalab.ece.uop.gr\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/ecsalab.ece.uop.gr\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=465"}],"version-history":[{"count":2,"href":"https:\/\/ecsalab.ece.uop.gr\/index.php?rest_route=\/wp\/v2\/posts\/465\/revisions"}],"predecessor-version":[{"id":489,"href":"https:\/\/ecsalab.ece.uop.gr\/index.php?rest_route=\/wp\/v2\/posts\/465\/revisions\/489"}],"wp:attachment":[{"href":"https:\/\/ecsalab.ece.uop.gr\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=465"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/ecsalab.ece.uop.gr\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=465"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/ecsalab.ece.uop.gr\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=465"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}