{"id":363,"date":"2022-01-02T20:25:12","date_gmt":"2022-01-02T17:25:12","guid":{"rendered":"https:\/\/ecsalab.ece.uop.gr\/?p=363"},"modified":"2026-03-30T16:33:57","modified_gmt":"2026-03-30T13:33:57","slug":"fpga-design-contest-participation","status":"publish","type":"post","link":"https:\/\/ecsalab.ece.uop.gr\/?p=363","title":{"rendered":"FPGA Design Contest Participation"},"content":{"rendered":"\n<p class=\"has-black-color has-text-color\" style=\"font-size:15px\"><strong>02\/02\/2022<\/strong><\/p>\n\n\n\n<p class=\"has-black-color has-text-color\" style=\"font-size:15px\">Our lab members Georgios Flamis, Stavros Kalapothas and Paris Kitsos participate in InnovateFPGA Design Contest 2021-2022 (https:\/\/www.innovatefpga.com\/portal\/ ). Their proposed project \u201cSoC design for enhanced keyword spotting applications with eliminated resources\u201d, is aimed to deploy a combined Machine Learning (ML) system based on both FPGA and HPS units of DE10-Nano platform that will be enhancing the capabilities of a keyword spotting (KWS) application. The project is already qualified in semi-final, and they are during the final integration and development. More information about the project can you find here (https:\/\/www.innovatefpga.com\/cgi-bin\/innovate\/teams.pl?Id=EM042&amp;All=1) .<\/p>\n\n\n\n<p class=\"has-black-color has-text-color\" style=\"font-size:15px\">Special thanks to Intel, Analog Devices and Microsoft. Without their donations this task will be impossible.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>02\/02\/2022 Our lab members Georgios Flamis, Stavros Kalapothas and Paris Kitsos participate in InnovateFPGA Design Contest 2021-2022 (https:\/\/www.innovatefpga.com\/portal\/ ). Their proposed project \u201cSoC design for enhanced keyword spotting applications with eliminated resources\u201d, is aimed to deploy a combined Machine Learning (ML) system based on both FPGA and HPS units of DE10-Nano platform that will be&hellip;<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[7],"tags":[],"class_list":["post-363","post","type-post","status-publish","format-standard","hentry","category-announces"],"gutentor_comment":0,"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v27.3 - https:\/\/yoast.com\/product\/yoast-seo-wordpress\/ -->\n<title>FPGA Design Contest Participation -<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/ecsalab.ece.uop.gr\/?p=363\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"FPGA Design Contest Participation -\" \/>\n<meta property=\"og:description\" content=\"02\/02\/2022 Our lab members Georgios Flamis, Stavros Kalapothas and Paris Kitsos participate in InnovateFPGA Design Contest 2021-2022 (https:\/\/www.innovatefpga.com\/portal\/ ). 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